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WLAN IEEE 802.11g PHY IP Core

802.11g PHY IP Core is a synthesizable HDL implementation of IEEE Standard 802.11g 2003 Edition in VHDL. The IEEE 802.11g specification specifies the Physical Layer Entity for a further higher data rate extension in the 2.4 GHz ISM band which builds on the 802.11b standard and uses Orthogonal Frequency Division Multiplexing (OFDM) system similar to 802.11a standard to achieve higher data rates.

The standard provides full backward compatibility with the 802.11b standard. It supports the 802.11b specified data rates of 1, 2, 5.5 and 11 Mbps and adds further data rates of 6, 9, 12, 18, 24, 36, 48 and 54 Mbps using OFDM modulation.


For additional information and licensing of the IP core please contact: info@seasolve.com

Technical Specifications

Dot Fully compliant to IEEE 802.11g Standard 2003
Dot DSSS, CCK and OFDM based technology
Dot Supports all data rates and modulation schemes: 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36,48 and 54 Mbps
Dot Guard against data loss by FEC implementation with rate 1/2, 2/3, 3/4
Dot Optimized Hard Logic Viterbi Decoder with puncturing of 1/2, 2/3, 3/4
Dot Supports Channel Estimation and Time domain and Frequency domain equalization
Dot Supports both Long and Short Preamble
Dot Timing synchronization - packet detector
Dot Low gate count, fully synthesizable, target independent code
Dot Designed in synthesizable VHDL for easy technology migration, Verilog on request
Dot Test suites with validation scripts for re-verification of core after user modifications
Dot Documentation
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