Viterbi Encoder Decoder

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General Description

SeaSolve’s Viterbi Decoder is a parameterizable high performance IP core that performs decoding of the convolutionally encoded data as well as punctured codes. The core is compatible with various standards such as DVB, 3G, WLAN, WIMAX IEEE 802.16d and 802.16e. This low latency decoder core supports various code rates, constraint lengths and generator polynomials and supports soft decision decoding.The core offers wireless Chipset designers, OEM’s and ODM’s a standard compliant platform to accelerate development process and reduce time to market.

Features

	Standards supported : DVB, 3G and IEEE 802.11 a/b/g
	Selectable code rates 1/2, 2/3, ¾
	Parameterizable trace backs depth of 35 to 105 for punctured data.
	Parameterizable constraint length up to 7
	Generator polynomials (G0 =1338,G1 = 1718)
	De puncturing of punctured convolutional encoded data
	Parameterizable generator polynomials
	Hard Decision Decoding
	Supports standards such as IEEE 802.11a/b/g and DVB
	VHDL simulation model
	Flexible architecture suitable for FPGA or ASIC
	Provide standard interface with external devices

Convolutional Encoder Block Diagram		Viterbi Decoder Block Diagram

Licensing

For additional information and licensing of the IP core please contact: info@seasolve.com

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